Key Takeaways
- IGBT switching losses are measured from integrated voltage and current overlap during each turn on and turn off event, not from steady-state values.
- Double pulse testing works only when gate drive, bus inductance, probe timing, and thermal conditions are controlled and documented.
- Datasheet energy values are useful reference points, but trustworthy design work comes from matching the actual switching cell in both measurement and modelling.
Transistor switching loss is measured by capturing device voltage and current during turn on and turn off, multiplying them into instantaneous power, and integrating that power over each transition.
That method matters because converter efficiency is set during very short intervals that a datasheet can only approximate. Electric motor systems consume more than 40% of global electricity, so small errors in converter loss estimates don’t stay small for long. You need a test setup that reproduces your bus voltage, load current, gate resistance, and layout. You also need a model that matches those same conditions if you want igbt switching loss calculation to line up with measured results.
Switching loss comes from energy inside each transition

Switching loss comes from the overlap of voltage and current while the device moves between off and on states. That overlap lasts for nanoseconds to microseconds. The energy inside each event is small, but the repetition rate makes it important. IGBT switching losses are always an energy-per-switch problem before they become a power dissipation problem.
A simple case shows why. A device that dissipates 2 mJ during turn on and 3 mJ during turn off at 20 kHz will burn 100 W in switching alone. That number comes from adding the two energies and multiplying by frequency. You won’t see that loss from static voltage drop measurements because conduction loss and switching loss come from different parts of the waveform.
That distinction sets the measurement method. You’re not looking for a single steady value. You’re isolating short events, then summing them into average power. That is why switching loss is usually recorded as turn on and turn off energy before it is converted into watts. Once you frame switching losses in IGBT devices that way, the rest of the test process becomes clear: capture the transition, calculate instantaneous power, and integrate only over the interval where voltage and current overlap.
A double pulse test gives usable switching loss data
A double pulse test is the standard setup because it creates one controlled turn on event and one controlled turn off event at a known current and DC link voltage. The first pulse establishes current in the load path. The second pulse creates the transition you want to measure. That isolates switching behaviour from longer control activity.
A usable bench setup has a small set of parts that must work as one test cell. Each part affects the measured waveform. The source and load set the operating point. The probes and connections decide how believable the result will be.
- A DC source with a stable bus voltage
- An inductive load that holds current during the pulse interval
- A low inductance power loop with short connections
- A gate driver with defined resistance and supply voltage
- Voltage and current probes with matched bandwidth and timing
You’ll often test a 600 V IGBT at several current points, such as 10 A, 25 A, and 50 A, because switching loss is not linear across the full operating range. The double pulse method keeps those operating points repeatable. If your setup adds uncontrolled ringing or current drift, the measured energy will say more about the fixture than the transistor.
“You’re not looking for a single steady value.”
Gate drive details shape the waveforms you must measure
Gate drive details directly set how fast the device crosses the linear region, so they directly affect measured switching loss. Gate resistance, gate voltage, driver current capability, and stray inductance around the gate loop all matter. A slower gate transition raises overlap time. A faster one cuts energy but can raise overshoot and ringing.
A common bench result makes this plain. Raising the turn on gate resistor from 5 ohms to 15 ohms will stretch the current rise and extend the period where collector voltage is still high. The integrated turn on energy then rises even if load current and bus voltage stay fixed. The same device can look efficient or inefficient depending on a resistor value that never appears in a simplified loss estimate.
That is why a clean switching losses in IGBT measurement always includes the actual gate waveform, not just collector voltage and current. If the driver saturates, if the negative off bias is weak, or if the gate loop rings, the loss result won’t represent the device alone. It will represent the entire switching cell you built.
Bus inductance sets the voltage overshoot during commutation
Bus inductance shapes the commutation transient because any fast current change across stray inductance creates extra voltage. That overshoot appears on top of the dc link and changes the instantaneous power you integrate. The effect is strongest during turn off, when current falls quickly and device voltage rises at the same time. Layout is part of the loss measurement, not a side detail.
A short calculation shows the scale. With 30 nH of loop inductance and a current fall rate of 1000 A/µs, the extra voltage is about 30 V from the relation V = L di/dt. On a 600 V bus, that overshoot is large enough to change both stress and measured energy. A long laminated bus, loose probe ground, or wide current loop will all make the waveform worse.
It’s easy to misread the source of that extra loss. The transistor didn’t suddenly become a different part. Your package, bus bars, capacitor placement, and probe connection changed the commutation path. That’s why datasheet energy values often fail in a lab build that uses a different dc link structure.
Turn on energy comes from integrating instantaneous device power
Turn on energy is calculated from instantaneous device power during the turn on interval. You multiply collector-emitter voltage by collector current at each sampled point, then integrate over time. The result is a single energy value, usually labelled Eon. Good igbt switching loss calculation depends more on the chosen time window than on the arithmetic itself.
A typical capture starts slightly before gate voltage rises and ends after collector voltage has settled near its on-state level. If a 400 V, 30 A event shows strong current overshoot for 80 ns, that overshoot stays inside the integration window because it contributes real energy. If you cut the window too early, you under-report the loss. If you extend it far into steady conduction, you mix conduction loss into Eon.
SPS SOFTWARE is useful here because you can reproduce the same gate resistance, bus inductance, and load current in a physics based model. You can then compare the integrated turn on terms against the bench capture. That term-by-term comparison often shows if the mismatch comes from probe timing, layout parasitics, or an incomplete device model. It also keeps the integration step separate from the device and layout assumptions.
Turn off energy uses the same power integration method
Turn off energy uses the same instantaneous power method, but the important waveform features are different. Collector voltage rises, current falls, and the IGBT current tail can carry significant energy after the main voltage rise. The result is usually labelled Eoff. If you ignore the tail, the number will be wrong even when the main transition looks clean.
A measured turn off event at 40 A often shows the current dropping quickly at first, then decaying more slowly as stored charge leaves the device. That last portion can last longer than the initial voltage rise, especially at higher junction temperature. Your integration window has to continue until the current reaches its final off value and the energy contribution has effectively ended.
Probe alignment matters more than many teams expect. A small timing skew between voltage and current channels shifts the apparent overlap and distorts Eoff. You should deskew the channels, verify polarity, and check sample rate before trusting any integrated value. Turn off loss is often where a neat lab trace hides a large calculation error.
Datasheet values hold only under tightly matched conditions
Datasheet switching energies are valid only for the exact test conditions used to generate them. Bus voltage, current, gate resistance, junction temperature, freewheel diode behaviour, and stray inductance all shape the result. If your bench setup differs, your measured loss will differ. That gap is normal, and it needs explanation rather than surprise.
Fan and pump systems using speed control can cut electricity use by about 30%, which is one reason accurate converter loss estimates matter outside the lab. A drive that was budgeted around catalogue loss values can run hotter than expected once the packaged hardware adds extra inductance and a different gate network. You won’t fix that mismatch with a better spreadsheet if the underlying test conditions never matched.
| Condition to match in your comparison | Why that condition changes measured switching energy |
| Match the dc link voltage used in the test | A higher or noisier bus raises switching energy because the device blocks more voltage during the overlap interval. |
| Match the pulse current at the switching instant | The measured pulse current must match the datasheet point because switching energy usually rises strongly with current. |
| Match the gate driver voltage and resistance | Different gate resistance or driver voltage changes transition speed and can shift both turn on and turn off energy. |
| Match the physical power loop inductance | Package and bus parasitics add overshoot and ringing that are often absent or lower in the vendor test fixture. |
| Match the device junction temperature | A colder device and a hotter device will not switch the same way, so the loss comparison must use the same thermal state. |
Once you compare those conditions line by line, most discrepancies become understandable. The bench result usually points to one or two dominant differences rather than a mystery inside the transistor. You can then trace the extra energy to a specific test condition. The useful question is which condition changed the waveform enough to alter integrated energy.
Physics based models expose loss terms before hardware iteration
Physics based models are useful because they let you reproduce turn on and turn off intervals with the same assumptions you use on the bench. You can inspect voltage, current, timing, and parasitics before cutting copper or repeating tests. That makes switching loss a traceable calculation instead of a single opaque number. It also gives you a fair way to compare simulated and measured results.
A useful model won’t replace measurement, but it will show where to look first. If the simulated Eon matches and Eoff is high on the bench, you can focus on current tail behaviour, diode recovery, probe deskew, or layout inductance. That narrows the fault search before you reopen every parameter. It also shortens the path from waveform capture to a defensible thermal budget.
SPS SOFTWARE fits that workflow because it lets you reproduce the switching cell with transparent models and compare loss integration term by term against measured waveforms. That keeps the model open to inspection when a result looks wrong. It also helps teams explain each loss term during thermal design and design review. That disciplined approach turns igbt switching losses from catalogue estimates into engineering numbers you can trust for efficiency prediction and hardware decisions.
“The useful question is which condition changed the waveform enough to alter integrated energy.”


